1. Field of the Invention
The present invention relates to a semiconductor device. For example, the invention relates to an electro static discharge (ESD) protective device.
2. Related Art
Conventionally, a gate grounded NMOS (GGNMOS) or a gate connected NMOS (GCNMOS) has been used as an ESD protective device. In the GGNMOS or GCNMOS, a gate electrode is connected to a source electrode directly or via a resistor. That is, a field effect transistor (FET) is diode-connected in the GGNMOS or GCNMOS.
When a voltage is applied to such a device in the forward direction of the diode, the parasitic bipolar transistor does not turn on. For this reason, an internal resistance of the protective device is not lowered; as a result, a breakdown of the protective device may be caused by heat generation. Particularly, the GGNMOS or GCNMOS formed on a silicon-on-insulator (SOI) structure has such poor heat dissipation, that an ESD resistance is low in forward bias. In order to deal with this problem, it is necessary that the size of the ESD device is enlarged, or that an additional protective device is provided. Thus, the related-art ESD protective device is not suitable for miniaturization.